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P0
Advanced UNIX User|Topics to Learn|8-3.0|12,44
# Topic
--- -------
1 - Introduction to make
2 - The Makefile
3 - Process Examples
4 - Internal Rules and Knowledge
5 - Makefile Macros
6 - Dependency and Library Files
7 - Default Rules
8 - Default Examples
9 - make Review
0 - Return to the Program Development Menu
P1
Project Development|Introduction|8-3.1.1|11,54
make is an automated tool for maintaining, updating,
and regenerating a group of computer programs.
make contains a sequence of entries that specify
which files are dependent upon which other files in order
to produce a target (typically a file).
make updates a target only if its dependents are
newer than the target.
P2
Project Development|Introduction|8-3.1.2|16,54
Without using make your tactics might be:
* to rely on your memory (very unsafe) or
* to use various commands to completely rebuild
the programs (a waste of the programmer's time
and CPU time)
With make, an interdependency specification
contains commands that are executed when a certain
module is found to be out of date. The commands
usually contain some action to update the module.
By using make only the files out of date are updated.
P3
Project Development|Introduction|8-3.1.3|16,54
Maintenance problems include:
* reading someone else's code
* changing the code
* rebuilding programs after changes
Rebuilding a program involves the following headaches:
* the program probably resides in several files
and/or modules
* some sources include other files
* some files are produced by a preprocessor
(which itself might be part of the system)
* producing a program from sources is more
complicated than a simple compilation
P4
Project Development|Introduction|8-3.1.4| 8,54
Let's illustrate the process, by producing the
executable image transform. Assume that a main
program module is stored in the file transform.c which
uses functions whose sources are stored in the file
transpack.c. Both of these files include a file of
common definitions called formtype.h. The situation
is illustrated graphically shown on the next screen.
P5
Project Development|Introduction|8-3.1.5|9,54
The traditional approach uses following steps:
1. Create transform.o with cc -c transform.c
2. Create transpack.o with cc -c transpack.c
3. Link objects to create an executable image with
cc -o transform transform.o transpack.o
P6
Project Development|Introduction|8-3.1.6|14,54
The approach using make involves creating
a shell script (called makefile) that specifies:
* file time dependencies
* shell commands associated with the target production
make determines which files have been updated
since the last compilation or production of the target
(if the target exists) and will execute and recompile
only those programs or files which have been found to
be out of date, changed or depend on files that have
been updated.
P7
Project Development|The Makefile|8-3.2.1|15,59
SYNTAX:
* Comments begin with # and continue to the end of line.
* All following lines that begin with a tab are shell
commands that must be executed to update the target.
The command is invoked as follows:
make [target] [options] [makefile]
NOTE: If the target file is not there or if the dependents are
newer, then the commands to produce the target are executed.
Makefile or makefile is the default script file.
P8
Project Development|Process Examples|8-3.3.1|12,58
The following example shows one of the simplest
means for organizing the data in a makefile without
using make's built-in knowledge.
transform: transform.o transpack.o
cc -o transform transform.o transpack.o -lm
transform.o: transform.c formtype.h
cc -c transform.c
transpack.o: transpack.c formtype.h
cc -c transpack.c
P9
Project Development|Process Examples|8-3.3.2|17,60
transform: transform.o transpack.o
cc -o transform transform.o transpack.o -lm
transform.o: transform.c formtype.h
cc -c transform.c
transpack.o: transpack.c formtype.h
cc -c transpack.c
In particular the line: transform: transform.o transpack.o
says that the target transform is dependent on transform.o
and transpack.o and the line below indicate the process of
making the target, if the target was found to be older than
one of its dependents. Similarly transform.o is dependent
on transform.c and formtype.h and it is made by compiling
transpack.c, etc.
Here the makefile is no better than a command file that
builds everything. It only helps remember the commands.
P10
Project Development|Internal Rules and Knowledge|8-3.4.1|10,54
make contains several internal rules for
creating one type of file from another type including
how to create an object file from a source file
file. Using the internal rules the process in the
example on the previous screen may be specified as:
transform: transform.o transpack.o
cc -o transform transform.o transpack.o
transform.o transpack.o: formtype.h
P11
Project Development|Internal Rules and Knowledge|8-3.4.2|8,54
The following example is identical to the
previous example. It has the similar first target
dependents specification; however, the assumption
is made that make knows how to make an object file,
provided the source is available.
Furthermore, rules are specified for making two other
targets, transform.c and newtrans.
P12
Project Development|Internal Rules and Knowledge|8-3.4.3|14,54
transform made from transform.c and transpack.c
newtrans makes transform.c from transform.dat
transform: transform.o transpack.o
cc -o transform transform.o transpack.o
transform.c: newtrans
newtrans <transform.dat >transform.c
newtrans: newtrans.o
cc -o newtrans newtrans.o
Note the implicit rule for transform.o
P13
Project Development|Makefile Macros|8-3.5.1|10,54
Macros are a shorthand for representing
character string information.
To invoke a macro type: $macro_name or
$(macro_name)
For example:
$O or $(O) or ${O}
$(berkflag) or ${berkflag}
P14
Project Development|Makefile Macros|8-3.5.2|8,54
Macros allow one to use one word to represent
a long expression or a list. In the next example we
see an elegant way of representing the problem in our
earlier example.
Note the macro usage both in the declaration part
and the dependency specification part. It is easy to
see that the clarity and efficiency are improved.
P15
Project Development|Makefile Macros|8-3.5.3|5,30
OBJ = transform.o transpack.o
transform: $(OBJ)
cc -o transform $(OBJ)
$(OBJ): formtype.h
P16
Project Development|Dependency and Library Files|8-3.6.1|18,54
The rules for remaking a file may depend on the
type of the files with which the file is out-of-date, e.g.,
1. C source_file into an object_file
2. object_file into an executable_file
3. lex_file into a yacc_file
Normally, an out-of-date target is remade the same
way every time it gets out-of-date.
If a library is out of date with some of its source
files, only those files need be recompiled and rearchived.
When dealing with library dependents one can use
:: instead of :
P17
Project Development|Dependency and Library Files|8-3.6.2|12,54
The next example shows make's features for
updating a library.
NOTE: The process is similar to that of making
a target of any other type, except that the dependents
are specified using ::.
In the situations with many files in a library,
make's features can save a tremendous amount of boring
time.
P18
Project Development|Dependency and Library Files|8-3.6.3|13,30
#TLIB = Some Archive
$(TLIB) :: tgetc.c
cc -c -O tgetc.c
ar r $(TLIB) tgetc.o
$(TLIB) :: tsearch.c
cc -c -O tsearch.c
ar r $(TLIB) tsearch.o
$(TLIB) :: tlist.c
cc -c -O tlist.c
ar r $(TLIB) tlist.o
P19
Project Development|Default Rules|8-3.7.1|17,54
The rules are based on file name suffixes and
certain flags.
Many rules are built-in. You can avoid the
built-in rules by using: make -r
Default rules consist of:
* macros
* a list of commonly used suffixes
* suffix transformation rules
You may add new default rules and override the
existing ones by changing the value of the predefined
macros.
P20
Project Development|Default Rules|8-3.7.2|3,54
The default suffix list is:
.suffixes: .o .c .f .r .y .l
P21
Project Development|Default Rules|8-3.7.3|9,43
Special macros include:
$@ target
$? younger dependents
$< file being transformed
$* common prefix
P22
Project Development|Default Examples|8-3.8.1|15,54
In the following example we're trying to make
a target "all" which has several dependents "*.lect",
which may be the targets.
NOTE: The rule for transforming src files
into lect files: the file being transformed, scr
is tbl'ed and the result is piped through nroff using
the ms macros. The result produced by nroff is sent
to the target file, lect.
SUFFIXES specifies the new suffixes, rules for
which are being introduced. TBL, NROFF, and NFLAGS
are the macros used in the make process.
P23
Project Development|Default Examples|8-3.8.2|13,54
TASK: You have many .src files. Each one is
tbl'd and nroffed to make a .lect file. You
occasionally update some of the .src files.
How do you know which files to nroff?
SOLUTION:
.suffixes: .src .lect
.src.lect:
$(TBL) $< | $(NROFF) $(NFLAGS) >$@
all: e.lect ed.lect cp.lect rm.lect ls.lect ...